1. Field
Exemplary embodiments of the present invention relate to a semiconductor device, and more particularly, to a CMOS circuit and a method for fabricating the CMOS circuit.
2. Description of the Related Art
Transistors such as Metal Oxide Silicon Field Effect Transistors (MOSFET) include polysilicon as a gate electrode. Since polysilicon contains a conductive impurity, which is a dopant such as phosphorus (P) and boron (B), a low resistance value may be obtained.
A Complementary Metal Oxide Semiconductor (CMOS) circuit includes NMOSFET and PMOSFET. NMOSFET includes a polysilicon gate containing an N-type dopant, which is referred to as an N-type polysilicon gate, hereafter, while PMOSFET includes a polysilicon gate containing a P-type dopant, which is referred to as a P-type polysilicon gate, hereafter. The N-type polysilicon gate includes phosphorus (P), while the P-type polysilicon gate includes boron (B).
Controlling saturated current of a transistor is significant for high-speed operation of a memory device, such as a Dynamic Random Access Memory (DRAM) device and flash memory device. The control of the saturated current is related to a polysilicon depletion ratio (PDR).
However, the problem with the control of the saturated current is that two significant characteristics in the formation of the P-type polysilicon gate are in a trade-off relationship. One is a boron penetration phenomenon and the other is a polysilicon depletion ratio (PDR). The boron penetration phenomenon means that boron (B) doping the inside of a polysilicon gate penetrates into a gate insulation layer. The polysilicon depletion ratio (PDR) means that the doping concentration in the lower portion of the polysilicon gate is decreased. When the boron penetration phenomenon occurs or the polysilicon depletion ratio (PDR) characteristics are poor, the operation characteristics of a transistor are deteriorated.
As described above, a method of further containing capturing materials to improve the boron penetration phenomenon and the deteriorated polysilicon depletion ratio of the P-type polysilicon gate have been suggested.
The doping concentration of a dopant may be increased by including a capturing material for capturing a dopant in a polysilicon gate and thus having the dopant piled up around the gate insulation layer. In this way, the polysilicon depletion ratio may be improved. Also, since the capturing material prevents boron from penetrating, the boron penetration phenomenon may be suppressed.
However, in case of the N-type polysilicon gate containing capturing materials, since an N-type dopant is excessively piled up around the gate insulation layer, gate oxide breakdown voltage is deteriorated.